08-28-2014 03:40 AM - edited 08-28-2014 03:44 AM
Hello. I have FlexRIO board PXIe-7966R. I'd like to calculate polynom of input data: 0.2139*x^3 - 0.0684*x^2+0.9524*x+0.0085 , where x - is I16 input data.
But i have a problem, that this calculating takes a lot of time - 20MHz. I'd like to execute this operation in single cycle timed loop with 125MHz clock. How can i optimize this operation?
08-28-2014 04:13 AM
Pipelining.
08-28-2014 04:19 AM
08-28-2014 04:27 AM
Another thing to take note of, what's your required latency? If your calculated value cannot be more than 1 cycle delayed from your input then LUT (as mike pointed out) is going to be the only way.
08-28-2014 09:58 AM
The NI LabVIEW High-Performance FPGA Developer's Guide discusses how to use the SCTL, and how it can be used to optimize throughput and minimize latency.