03-07-2013 04:24 AM
If case structure outputs same size of array from both the cases, there is no issue. Issue is when the sizes are different.
03-07-2013 04:41 AM
03-11-2013 02:40 AM - edited 03-11-2013 02:40 AM
Okay GerdW , agreed. Creating different VI's for different cases is the only alternative is it?
For the other question of mine regarding copying the array elements to a constant array on FPGA Target, entering individual elements is the solution?
03-11-2013 10:10 AM
If you are in or can sign up for the 2013 Beta, the LabVIEW FPGA Module now supports compile-time resolution of array sizes which means you can write VIs that accept variable-size arrays and as long as the compiler can infer fixed-sizes for the arrays your design will be synthesizable.
03-11-2013 12:31 PM
@Dragis wrote:
If you are in or can sign up for the 2013 Beta, the LabVIEW FPGA Module now supports compile-time resolution of array sizes which means you can write VIs that accept variable-size arrays and as long as the compiler can infer fixed-sizes for the arrays your design will be synthesizable.
Wow really? Is that public knowledge? Because I thought those in the beta couldn't talk about its features.
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03-11-2013 01:40 PM
Well, this somewhat related to several ideas from the idea exchange, so in general we would have marked the idea as "In Beta" anyway. So, if you don't tell anyone, I won't : )