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This is a long shot, but might as well ask. Has anyone implemented LZW decompression in LabVIEW FPGA, and if so, would you be willing to share your code?
I know someone has done it so it is possible, but I don't know of a public source. If you are in a time crunch to get an implementation working, you could get one of the open source VHDL, Verilog, or SystemC implementations and import that with the IP Integration Node or as a CLIP. Various discussions on the forums and the documentation describe how this can be done.