How to use a counter to build a Logic Analyzer?

[RedAG]

Hi guys, i have heard that we can use a counter as a Logic Analyzer based on an incoming signal and its clock frequency. Anyone know how this works?

I am trying to read a set of signals, which I have no knowledge of  except that there would a Clock, reset and a data line; and I want to develop a Logic Analyzer to 'know' these signals.

Thanks, Anoop

[GerdW]

Hi Anoop,

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i have heard

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Maybe you should ask that guy that told you all about Logic Analyzers created from counters?

[RedAG]

Hi Gerd,

I would ask him, but he seemed to think that I am better off trying to get help professionally, which I cannot do.

I posted this here to see if someone could be of help, I am a beginner and digital timing especially is not my strong point.

Thanks for your reply.

Anoop

[LaThoS]

Hi Anoop,

I don't see where you are coming from here. The counter could be for several purposes in a logic analyzer. It could be used to generate a timing source, detect the frequency of an incoming clock line, or be used as hardware-based delay logic. Either way, I do not believe you can use counters alone to create a logic analyzer. You are better off just doing whole port reads from a digital input port at specified intervals. Frequency and jitter constraints will decide on the timing method you need to use (eg software or hardware), and may limit you to using an FPGA system, transferring data back over a DMA FIFO to your host machine.

You are then free to implement various pattern match and interface algorithms (eg I2C, RS232) in software on the host.

I hope this helps,

[RedAG]

Thanks Lawrence,

Basically, I wanted to know this as I want to read in a number of unknown signals, signals which I have no idea about; including their pattern, the number of signals and their timing.

[LaThoS]

Hi,

It may be better to use an off-the-shelf Logic Analyzer for this, at least until you know what you are working with.

Kind Regards,

[RedAG]

I wish I could, but the cost of it means that my manager would not hear about it 😛

[johnsold]

It seems that the first thing you need to do is to determine some parameters, even if they are only estimates.

How many digital signals do you need to examine simultaneously?

What is the maximum frequency?

What is the maximum and minimum number of samples per signal that you need to capture?

Do you know anything about any of the signals which could be useful? You have already mentioned that at least one signal is a clock. Are any of the signals ever in a high impedance (tri-state) mode?  Is the minimum pulse width for non-clock signals the clock period, half the clock period, or something else?

Having answers to these questions will allow you to determine the type of hardware you will need to begin to implement a logic analyzer.

Lynn

[RedAG]

Lynn,

I have a PXI-7813R, which along with its FPGA is sufficient I believe for this purpose.

How many digital signals do you need to examine simultaneously?

Well, I am not sure, but based on the signals generated by similar devices, I would guess between 4 and 6. I expect there to be a Clk, Rst, Data and some other signals.

What is the maximum frequency?

I have no idea or how to even come up with a guess on this one.

What is the maximum and minimum number of samples per signal that you need to capture?

Again, not a clue. Would it not depend on the Clk frequency?

Are any of the signals ever in a high impedance (tri-state) mode?  

Again, don't know, sorry.

Is the minimum pulse width for non-clock signals the clock period, half the clock period, or something else?

Sorry again.

How would you go about in this situation?

[LaThoS]

Hi,

You can connect the signal to an oscilloscope to determine the frequency of the clock line. To find out which one this is look for the signal with a repeated period - ie easily identifiable as a clock.

The number of samples you need to collect depends on what you are looking for. If you were analyzing an I2C serial line to find the first n commands, you would need to capture the amount of logic transitions/samples required for that information to be sent. Then you can analyze it and find what they were.

Do you know what prototcol the communication is? If you do then you can find out details regarding frequency and high impedence states from the documentation.

Kind Regards,