Hello,
In general I'm trying to lock transmitter and receiver together. It seems easy to lock the carrier frequency, however no matter what I do, I seem to have a drift in my sampling frequency (on the order of 1ppm).
Is the sampling clock in the 5663 digitizer tied to the same clock reference as the LO? ... I didn't think I would need the TClk mechanism here since I don't care about delay ...
Any thoughts are greatly apreciated. Below are a few specifics.
I'm using the 5673 as transitter and 5663 as receiver. I've noticed the folowing:
1. When each are using a 'Reference Clock Source' = OnboardClock I have a noticeable carrier offset at the receiver (eg 5.8 GHz carrier has ~7 KHz offset) and this is fine.
2. When each are using a 'Reference Clock Source' = PXI Clock, with the chassis physically tied, I see no noticeable carrier offset at the receiver.
3. When 5673 is using 'Reference Clock Source' = OnboardClock, 5663 using 'Reference Clock Source' = ClkIn (ClkIn/Out physically tied), I see no noticeable carrier offset at the receiver.
