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How to account for natural delay between output and input

Hello all,

 

Ive been trying to brainstorm ideas on how to implement a fetaure for a VI I am writing. The current app I am writing is for a life cycle test. For example, the VI will be controlling the frequency and cycle count of the actuation of many buttons. It is also capable of monitoring the feedback from the buttons. The feature I wish to implement into the VI will allow the VI to stop or pause if the button is actuated but there is no feedback from the button, ie. a failure. This seemed simple to implement at first. Just a simple, if signal sent to button and no feedback recieved, then failure. But there is natural lag between the time the computer can send out the signal to the Daq and the time that the button can send a signal back to the computer. 

 

So basically, im trying to figure out how to account for that slight delay that the computer is sending out a signal but no signal is being sent back from the button. If you have any ideas, please let me know.

 

Thanks.

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Can you provide some code? It seems like you just need to add a delay? there are several timing functions available in the timing pallet. You can use a time delay function if you need to control data flow.



-Matt
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Hi Tyler,

 

what about a state machine with (atleast) 3 states:

1. Set button signal

2. Wait amount of time

3. Read back button signal and check validity

 

Seems easy to implement…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Do you switch channels or test all at once?

Is feedback digital or analog?

How long does the button send on feedback? Is it pulse?

What order of delay do you expect?

What hardware do you use?

 

Simple way: read multiple times faster than button can switch off. Start reading before turning on

Single channel: initiate trigger (input), set timeout, then turn on.

One more idea: Fast test, small delay: generate a pulse frequency - your test frequency, duration - delay when button should give feedback. Set rising edge of this pulse as clock for turn on task, falling edge - for read task clock. If you have hardware timed digital board, it is the most efficient and fastest way. 

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My code is too large and messy to provide any thing hepful, I think. But basically, there is two parallel while loops. one is controlling multiple channels of a daq, which is actuating an air cylinder that will hit different buttons on some device. It is constantly sending out a square wave that tuns the button on and off. The other loop is reading from a com port that is connected to the device. This loop gets all the button readings from the device. 

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The question is how do you synchronise these loops?

Software approach: generator loop initiates single cycle and at the same time sends command (queue, event) to the acquisition loop that should be waiting for it. When acquisition loop receives command, it acquires after your delay.

Hardware: I guess com reader does not have trigger. Can you connect one of the outputs to one of the inputs and generate output on that channel when buttons should be on (including delay)? Then Acquisition loop can read asynchronously and pay attention only to the data when that fixed input is on (button should be pressed). It should read faster than button state can change back.

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Without seeing your code it's hard to suggest the best implementation.

 

Two options to avoid false errors:

1) Avoid checking for errors until the results are valid.

    This is what GerdW suggested by using a wait state in a State machine

2) Produce an "Inhibit" signal to mask invalid errors using a simple timer.

    See the attached example. AND the Inhibit output with your error line

    to avoid detecting an error for a specified period of time. (Inhibit is low

    from when Change occurs until Delay in seconds is complete.)

 

Inhibit Error1_BD.png

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