Hi, folks!
This might seem a trivial question, but I'm completely at a loss here. I have made an RT-project in LV8 which (among other things) samples data continuously from two cards located in a PXI-system. All 32 (16+16) differential channels are used and one task for each card is configured in MAX. Since signal phase is an issue, I need to synchronize both tasks accurately. The lv8 code examples have a couple of VIs that should have been directly applicable to my situation, and I have studied them (and lots of others) in detail.
I have attached one example below that seemed to be spot on, and it makes use of the external PXI_Clk10 clock located in the pxi backplane. Here the confusion starts. When you attach a constant to the "source" input of the "sample clock" VI you get a drop-down list of possible sources. In the example code, PXI_Clk10 is chosen in this list, but when I try to do the same I discover that this option is simply not present. Only internal timing sources (located on the cards) can be chosen. If I configure the timing of the tasks directly in MAX, the PXI_Clk10 is an available option, but this leads to a vague error message when I start the tasks saying roughly that "it might be that you did not specify a name for the external sample clock...".
I have tried everything. My PXI-settings in MAX, routing signals via PFI-pins (didn't work at all), etc etc.
What is going on? Also: when routing a signal through a pfi-port, does this necessitate connecting the pfi-connectors physically or is the signal routed internally through the backplane? It doesn't help that I use BNC-2110 connector blocks. How can I be sure that the connectors on these blocks actually correspond to the terminals on the cards? I can't find a wiring diagram anywhere on the web.
Some facts: PXI-1031 chassis with PXI-8184 controller (dual boot) and two cards PXI-6229 / PXI-6259. These cards are located in slot 3-4.
Regards, Einar