From Friday, April 19th (11:00 PM CDT) through Saturday, April 20th (2:00 PM CDT), 2024, ni.com will undergo system upgrades that may result in temporary service interruption.

We appreciate your patience as we improve our online experience.

LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

How do I use registers on FPGA chips more effectively.

When I store data in an array with the FPGA module, it takes more than 50 slices per 16 bit number. I understand that a slice can serve as a 16x1 RAM, so I should be able to store a 16 bit number in one slice. How can I do this? Please don't tell me to use block RAM, but help me solve the problem I want to solve. Thank you.
0 Kudos
Message 1 of 7
(3,304 Views)

Greetings!
      An array so long as it is within 32 bits takes up one flip flop per bit. And any array which is past the 32 bit limit will take up twice as many flip flops in logic. And assuming you are not exceeding the 32 bit array size, you will have up to 2 slices per flip flop (bit). Please refer to the following link for information on these terms.

http://digital.ni.com/public.nsf/websearch/33D4F29F1483548586256D740058B428?OpenDocument

Please refer to the following really awesome materials towards using data types for FPGA.

http://zone.ni.com/devzone/conceptd.nsf/webmain/10ff44f70a213a068625706500745350
http://zone.ni.com/devzone/conceptd.nsf/webmain/5c4971654f6bc69f86256f7100551cf6

For an example, a 16 bit number would take up to 40 slices. Please approach the usage of arrays with this in mind for your application.
Hope this helps
Best regards
Avi Harjani

0 Kudos
Message 2 of 7
(3,277 Views)
Avi,
 
Thanks. I take it that there is no way to use the LUT to store a 16 bit number. Is that your understanding too?
0 Kudos
Message 3 of 7
(3,267 Views)
Greetings!
   The look up table allows for access of up to 32 bits. So per your last mention is not true. The memory on the Lookup table does not use logic, but uses volatile memory on the FPGA. The maximum memory on the FPGA you can use is 80KB. Depending on the number of elements you are using the memory being used on the FPGA varies.
Thanks and hope this helps, and if not please let us know.
Thanks much
Avi Harjani



0 Kudos
Message 4 of 7
(3,262 Views)
Just to clarify. I think rocketscientist was referring to the LUTs in a slice not the Look-Up Table function which does indeed use Block Ram. Arrays are not stored using the LUTs of a slice since each bit would have to be accessed serially. So a 16 bit element may be stored in 1 LUT, but it would require sequencing through the LUT to get all the data. We use the Flip-Flops to store the array data which allows parallel access to all the bits and generally faster timing.
Regards, Joseph D.
0 Kudos
Message 5 of 7
(3,254 Views)
Thanks. I understand what you are saying and appreciate the help.
 
Let me tell you what my problem is. I am trying to read 64 channels of data at 62.5 ksps per channel using 8 cRIO 9201 DAQ cards. The way I am doing it, I apparently have to store the 64 numbers on flip-flops first (i.e. in an array), and then write these to block RAM using a  pipeline approach. These 64 numbers (128 with pipeline) take up more gates than I have available. If I read 1 channel at a time, I cannot get the sampling speed I need. Is there any way to do this more efficiently by writing data from DAQ directly to RAM?
0 Kudos
Message 6 of 7
(3,232 Views)
Greetings!

    Is there a specific reason that you are reading the 64 numbers at once?

1)  A better approach in your case is to use FPGA FIFO's in a parallel loop to write the data as you sample.

  Please refer to the following links
     http://zone.ni.com/devzone/conceptd.nsf/webmain/10ff44f70a213a068625706500745350

2)In the version of FPGA 8.0 you could use DMA to write from DAQ directly to RAM
http://zone.ni.com/devzone/conceptd.nsf/webmain/c1013cb24fc508ef8625708b0071b3fb
http://zone.ni.com/devzone/conceptd.nsf/webmain/0b5ff8ed662652ee8625708c00548ed8

A little bit more about FIFO's is with the LabVIEW FPGA module, you can define the type of storage the FIFO uses in the FPGA. These different types are recommended for the number of bytes it will contain:

    * Flip-Flops: Stores the data with standard flip-flops. This option stores the data using gates on the FPGA. Use this option for small FIFOs, up to 100 bytes.

    * Look-Up Table: Stores the data in a look-up table available on the FPGA. Use this option for FIFOs between 100 and 300 bytes in size.

    * Block Memory: Stores the data using embedded blocks of memory. Use this option for FIFOs larger than 300 bytes.

Thanks and hope this helps
Avi Harjani



0 Kudos
Message 7 of 7
(3,193 Views)