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FPGA: reuse code library

I am thinking about creating a library of reusable host subvi for fpga application.  To communicaiton with the FPGA VI, the host vi would contain a FPGA reference, and it is generally a good practice to make that a type def (is that correct?).  When I create a reusable subvi, the reference input will not be a type def, and when I feed a type def into the terminal, I will get a coercion.  Is that the only way?     

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Check out this article in the LabVIEW Help:http://zone.ni.com/reference/en-XX/help/371599H-01/lvfpgahosthelp/fpga_dynamic_host_interface/


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Does it mean I just need to select dynamic mode in configure open fpga vi reference?  What role does the dynamic fpga interface cast play?  Thanks!

 

 

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