LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

FPGA output pattern based on huge text file

Hi,

      I have a huge simulation pattern vector text file that I wish to run and output on a FlexRIO, to test a DUT's custom scan chain.  

Each line of the txt file is as follows.

Scan_vector.jpg

 

I need to translate this into a waveform where each vector is 9 clocks long (for timing resolution purposes) e.g. 0 = 000000000, 1= 000000011 2 = 000011100, ... 7 = 111111111

So the first 2 vectors would look something like this:

Scan_vector2.jpg

 

As my file has ~4M vectors and each vector is at least 9 clocks (may in crease to 18 clocks for improved resolution) a file for all the clocks isn't feasible in the host, (Input file is ~200M and output from the FPGA will be the same, also comparing input and output would not be possible.)

I was thinking best approach, if possible, is to get the FlexRIO FPGA to stream in the .txt file, convert the Vectors into the clock steps to output whilst streaming back the DUT outputs to another file. Expected vs. Actual for each clock edge could also be tested in real time. This has to be able to run at a data output rate of say ~8MHz

Does this sound possible or a reasonable apporach. I've only ever used FlexRIO where patterns have been sent/returned from host via FIFO's and not sure how stream from files would work?

Thanks,

 

 

0 Kudos
Message 1 of 4
(2,958 Views)

ok, after taking a couple of minutes to think this over I think I need make what I'm trying to do more realisitic.

I need the HOST to be able to stream the .txt file strings down to the FPGA FIFO, whilst streaming the returned data  via a FIFO to HOST, and the host must stream this to file simultaneously.

I guess I need to know how I can run these streams succesfully in parallel without any over/underflows occurring.

 

 

0 Kudos
Message 2 of 4
(2,941 Views)

I agree that this seems like a sensible approach. The system is deterministic enough that if you are careful with your timings than you can avoid buffer over/underflows. Have you tried to implement this yet?

 

Adam.

0 Kudos
Message 3 of 4
(2,891 Views)

Hi,

       I've had some direct contact with support at NI, where further options were discussed. It was suggested that using the DRAM may be my best option. I'm using PXIe-7966R with 6581 module so may have enough memory depth to store the full pattern file. I'm just working through getting DRAM up and running at the moment. As my file has some strings e.g. 'X' do denote a 'don't care' response, I'll need to code asign these a numerical value for the DRAM.

     After the initialization, where the file is writen to remote DRAM I should be able to run the pattern then quickly. I keep progress posted.

    Thanks

0 Kudos
Message 4 of 4
(2,847 Views)