FPGA oddity

[UliB]

Hello,

I have a problem with FPGA communication between host and target.

I am on Windows 7 with LabVIEW 2015 SP1, no Real Time involved.

What I have is a FPGA target VI, which is working in interactve mode. If I control the target VI with a minimal host VI it is working. Minimal host VI means: 'Open FPGA VI Reference', 'Run' method, writing and reading control values in a loop and 'Close FPGA VI Reference' after the loop (see picture).

'Minimal Host VI' is just for testing, normally I work with a message based state machine.

But the state machine stopped working with the target VI. 'Open FPGA VI Reference' (configured to use a bitfile) returns a reference and no error. 'Run' method returns no error. The reference which goes in read control node is equal to the reference from 'Open FPGA VI reference', read control block returns no error, but it returns ony default values for all controls.
If I configure 'Open FPGA VI Reference' to 'Run the FPGA VI', then 'Run' method returns warning 61003 meaning that the FPGA VI is already running. OK, this is expected. But read control node does return only default values.

If I run my state machine (receiving default values) and I start FPGA target VI (interactive mode) in parallel or minimal host VI in parallel, then there seems to a sync and the state machine starts returning real values.

Do you have any ideas what I can try?

UliB

[MaxJoseph]

It sounds like your FPGA vi is not deploying onto the FPGA when you hit run on your host vi. When you start the host and then start the FPGA vi, the FPGA vi deploys and runs and you get real data coming through because now your FPGA vi is actually running.

Are you pressing 'deploy all' on your FPGA before pressing run on your host vi?

[UliB]

Hello MaxJoseph,

I am not sure what you mean. I never used 'deploy' or 'deploy all' in this project. I think 'deploy' belongs to real time which I don't use.

As far as I know 'Open FPGA VI Reference' is the node which transfers the bitfile to the hardware and if configured runs/starts the FPGA VI.

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@MaxJoseph wrote:

It sounds like your FPGA vi is not deploying onto the FPGA when you hit run on your host vi. When you start the host and then start the FPGA vi, the FPGA vi deploys and runs and you get real data coming through because now your FPGA vi is actually running. [..]

Yes, it seems FPGA target VI is not running on 'first call', but on 'parallel second call'.

But when I configure 'Open FPGA VI Reference' to 'Run FPGA VI' why does 'Run' method throw a warning 61003 meaning 'FPGA VI already running'? I really don't understand what is going on.

UliB

[MaxJoseph]

You could try and use a 'get status' or similar to see what the FPGA thinks is running. Then work from there? I have vague memories of occasionally experiencing something like this, but it doesn't seem to happen to me now. Sorry I can't be more help!

[UliB]

Hello MaxJoseph,

thank you for your suggestion. Right now I am not aware of a 'get status' node for FPGA, but I'll have a look.

UliB

[UliB]

Hello,

I found the culprit sitting right in front of the screen.

I thought it was a good idea to add 'reset' method, but called it just after 'run' method, which stopped 'FPGA target VI' immediately.

Thanks for helping.

UliB