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FPGA exact frequency sine wave generation

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Hallo everybody,

 

I have a myRIO and I want to build a lock in amplifier. Therefor I need to excite a laser (actually the laser driver) with a certain frequency, in one case 32754Hz +-1Hz. This signal has to be a square wave. Additionally I need a sine and a cosine with the excact same frequency I use to excite the laser. But the sine and cosine do not have to be sent outside the FPGA via a digital or analog port.

To sum it up, I need a square wave, sine and cosine with excactly the same frequency. Only the square wave is sent out via an analog port. (I use the "square wave generation.vi")

 

This works fine for e.g. 4212 Hz. But 32754Hz can not be represented good enough by a 40MHz clock (a lot of jitter). Therefor I thought about using a Schmitt-Trigger.

 

Finally I come to the point! I use the "sine wave generator.vi" on the FPGA.

Can I output a sine wave with any frequency I want using this VI, if Nyquist's law is not hurt??? As this VI uses DDS I think yes, can someone confirm this?

 

I ask this, because the sine wave will be converted into a square wave by the schmitt-trigger and still should have the same frequency as it represents inside the FPGA.

 

kind regards

 

Slev1n

 

 

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Hi Slev1n,

 

The Sine Wave Generator does use DDS with a 32-bit accumulator, so you'll get mHz resolution on the frequency. Both the Square and Sine generators are built on DDS. As long as they're driven off the same clock their frequencies are identical.

 

Since jitter is a big challenge with square waves, the Square Wave Generator functions kind of like a loop timer when outside the Single-Cycle Timed Loop (SCTL)--it will block until the next edge in order to produce the transition on the right clock cycle. So your jitter should be less than 25 ns of the 31 us period at 32754 Hz--is that the jitter you're seeing? Due to this behavior, you'll need to put the two generators in separate loops in order to avoid throttling the sine wave sample rate to that of the square wave.

 

Jim

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Hey JLewis,

 

the sine and square wave generator are in different loops (while loops) already. And I can confirm your explanation regarding the square wave generation. I checked the looptime with a tick counter. That is why I wrote a program to only use frequencies which have an even tick number so no jitter is produced. But as I mentioned that is not working for 32754Hz only for 32733Hz. I have not checked the exact jitter time, but I know that the jitter is always under 25ns as LabVIEW is "averaging" between the previous and next representable frequency.

That is why I want to produce a sine wave with the sine wave generator and use a schmitt trigger outside of the myRIO to get a square wave with the same frequency of the sine and cosine.

 

But 2 questions remain. I get the point with the 32-bit accumulator (input is fxp I32.0).

1, How can I calculate/derive the resolution?

2, Has only the size of the LUT or also the amplitude resolution an influence on the frequency resolution?

 

 

Hope you can help me.

 

Kind regards

Slev1n

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Accepted by topic author Slev1n

@Slev1n wrote:

Hey JLewis,

 

1, How can I calculate/derive the resolution?

2, Has only the size of the LUT or also the amplitude resolution an influence on the frequency resolution?

 



1. The resolution depends only on the accumulator size and clock rate, e.g. 40 MHz / 2^32. Lowering the clock rate increases the resolution of the average DDS frequency, but will adversely affect jitter due to the increased clock period. In your case, it sounds like you're more interested in resolution of jitter-free frequencies, which are those for which the clock rate is an integer multiple of the frequency, e.g. freq * k = 40 MHz. You can play games with derived clocks to hit specific desired frequencies, but in general most frequencies won't be jitter-free.

 

2. Other parameters don't affect the resolution, but do affect phase and/or quantization noise. For your application I expect that phase noise is the bigger issue, and is affected by LUT size, the interpolation option, and samples/cycle (ie, the loop rate). Quantization noise is affected by the output data type and amplitude (if not full range). You'll get some filtering via the D/A conversion and Schmitt trigger, so it's hard to predict how much of a concern these parameters will be for you.

 

You might want to check out the Xilinx DDS generator (on the Xilinx IP integration palettes). It has a few more options like phase dithering and a 48-bit accumulator. Their documentation on the theory and effects of various parameters is excellent: http://www.xilinx.com/support/documentation/ip_documentation/dds_compiler/v6_0/pg141-dds-compiler.pd...

 

Hope this helps!

 

 

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Hey Lewis,

 

it is right, that I want jitter free square waves and I know thats not always possible for every frequency.

 

But am I right, that the sine/cosine is jitter free?

 

I can only imagine phase noise due to the finite amount of points in the LUT as you already mentioned...

 

kind regards

Slev1n

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Hi Slev1n,

 

I'm not sure what the technical definitions would say about that, but yes, I think that particular jitter issue is specific to the wideband nature of the square wave. If I imagine using an infinitely large and precise LUT for both sine and square waves, I would only expect to see jitter in the square wave case. It's been a few years and I'm relying on intuition at this point...

 

Jim

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i don't think you are using jitter in the correct context here.  the dds frequencies not not have jitter but do have quantization errors.  the output frequency is quantized  by the dds increment.  you can compute the actual output frequency which will be close but should not have jitter per se.  jitter would be a result of the output loop jitter (not outputing at a jitter free delta t) and not the calculation.  you can typically achieve 1 tick jitter on analog outputs.  this application should be using digital output for generation of the square wave while computing the frequency using DDS techniques within a SCTL.  the internal sine and cos can  be implemented with a LUT depending on the points per wave you are looking for with the cycle.

Stu
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