FPGA connection error -63040

[johnsold]

I am working remotely with a colleague who has access to the hardware. Both of us are completely new to FPGA.  

cRIO 9067 with 9213 and several other modules. MAX can see it and says it is connected and running. LV 2015 with FPGA. (LV2012 is also installed on the same computer.) It is running on an iMac with Windows running in Bootcamp (I think). Not sure which version of Windows.

When we try to run any simple program including some examples we get error -63040: "A connection could not be established to the specified remote device. Ensure that the device is on and accessible over the network, that the device is not is safe mode, that NI-RIO software is installed, and that the RIO server is running and properly configured."

The compilation report lists the target as (RIO0, cRIO-9075).  We do not have a 9075.  I suspect that this is not significant but mention it because we observed the discrepancy.

Referring to the error message, we think that the software is installed. Certainly the device is accessible over the network because MAX sees it. I suspect that the issue is related to the RIO server. We could not determine whether it was running or how to configure it.

I found the following links while searching:

http://forums.ni.com/t5/LabVIEW/fpga/m-p/2957885/highlight/true#M852820 FPGA requiring Xilinx 10.1.  Note: the link by Hooovahh does not work.

http://forums.ni.com/t5/LabVIEW/Error-when-create-LabVIEW-FPGA-Control-on-CompactRIO/m-p/3229590/hig...  The next to last post by Andy M. shows how to force reinstall. The last post refers to some versions of drivers.

http://forums.ni.com/t5/LabVIEW/A-connection-could-not-be-established/m-p/2874068/highlight/true#M83...  The third post in this thread, by RyanPoPo, may be helpful.  He describes how to get the IP address into the project.

I have forwarded these to my colleague to see if any of those help.

We came across another error message or something in a Help file while trying various things earlier which suggested using Open FPGA Reference.vi. However, this VI does not appear to exist in the LV 2015 FPGA libraries.  It is in LV 2012. My colleague tried an example from LV 2012 but ran into an error requiring Xilinx 10.1 which he did not find.

Any suggestions?

Lynn

[mateh]

Just out of curiosity, how did you add the 9067 to the project?

In your case the "cRIO-9075" discrepancy is significant. The physical FPGA device (and/or the way it is configured and routed inside the chassis) is different between each model number (9067, 9075, etc), therefore the bitfiles that get compiled and downloaded to the FPGA are not cross-compatible between models. When your project contains an FPGA VI, LabVIEW will compile that VI for the specific model number that it is shown under. With this in mind, most of the examples were probably written with a different set of hardware in mind, which means you would need to modify the project to add your specific controller and FPGA target, and then copy the VIs, modules, and any other related items under this newly added section of the project. After this is done, you must recompile the FPGA VI to generate the appropriate bitfile.

[johnsold]

I am not sure of the details because the other guy was at the computer. 

I know that at least once we created a new project and then added the 9067 to it, along with the modules that were installed.

It is possible that the 9075 came from the built-in example that we tried.

We always got the -63040 error although I only recall seeing the 9075 once.

Lynn

[mateh]

Hmm.. there are two ways to add the RT and FPGA items to the project: either by automatic detection (selecting "Existing target or device" in the dialog window), or by adding it manually (selecting "New target or device").

If you haven't gone through these steps, I would start with a blank project just to debug this issue. The first step would be to see if the RT target shows up on the list using the "Existing target..." option and try to add it that way. If that works, select "LV FPGA Interface" at the next prompt, and then select "Discover" at the prompt after that. At this point it will attempt to discover the C Series modules that are plugged into the chassis. It may provide more insight depending on which (if any) of these steps fails.

[johnsold]

Here is the update I received from my colleague this morning:

"So I tried to recreate the NI 9213 Getting Started.vi, but of course had problems.  The first is that on the example the first item is a FPGA I/O Property Node.  It has a type def control as an input.  I selected the FPGA I/O Property Node on mine and there is no input on it.  There is no change to read and I can't select anything under property.  Also the example has error in and out and does not have FPGA I/O in or out.  When I drop it on mine it is the opposite.  There is no error in or out but there is a FPGA I/O in and out.  So I just dropped an FPGA I/O node and put a couple of channels as outputs like the example.  I tried to compile it and got the same error; Xilinx tools are not installed.  Of course, it didn't say which ones.  Is it because I don't have it set up like the example or am I missing something?..."

Any suggestions?

Lynn

[mateh]

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 I selected the FPGA I/O Property Node on mine and there is no input on it.

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First you have to point the property node to a specific device in your project. This is done by right-clicking on the property node, choosing Select Item, and then choosing the item in the submenu. This list follows the heirarchy of your project, so if you want to access the Conversion Time property for "Mod1" in the example project, you would choose "Select Item">"FPGA Target">"Mod1", and then Conversion Time will appear on the list of properties.

In the case of the example project, a second "Mod1" entry with an arrow next to it will appear on the Select Item menu, and the channels will be shown in that submenu. This is because the project has a folder called "Mod1" which contains the channel IO items.

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Also the example has error in and out and does not have FPGA I/O in or out.  When I drop it on mine it is the opposite.

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The default behavior for nodes in LV FPGA is for error terminals to be turned off, since this uses fewer FPGA resources. You can turn error terminals on or off by right-clicking on the node and selecting "Show/Hide Error Terminals".

The FPGA IO can be selected through an external control wired to the FPGA IO In terminal (useful for subVIs) or by manually selecting the IO item on the node itself (left-click on I/O Item and choose the channel IO in the menu), as it looks like your colleague has done. Both have the same effect.

This KB explains which version of the compilation tool is needed for your particular set of hardware:

http://digital.ni.com/public.nsf/allkb/7CF3DD1ABBE6AE5886257EFB0006E303

The version required for the cRIO-9067 is Vivado (2013.4 or later).