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FPGA compile error

 I am getting error from this perticular FPGA VI while compiling. The FIFO I have configured in my project and I'm sending the data from other place to this FIFO. The error while compiling says -

 

Elaborating entity <NiLvFxpEnableHandlerSlv> (architecture <rtl>) with generics from library <work>.
ERROR:HDLCompiler:1566 - "C:\NIFPGA\jobs\si944sF_B3D8t4R\NiFpgaAG_Y_Phase_Sine_dash_Cos.vhd" Line 301: Expression has 8 elements ; formal cdata expects 9

Elaborating entity <NiFpgaAG_00000004_CustomNode> (architecture <rtl>) with generics from library <work>.
Execution of entity nifpgaag_00000004_customnode failed
Netlist NiFpgaAG_Y_Phase_Sine_dash_Cos(vhdl_labview) remains a blackbox, due to errors in its contents
-->

Total memory usage is 191384 kilobytes

Number of errors : 1 ( 0 filtered)
Number of warnings : 12 ( 0 filtered)
Number of infos : 0 ( 0 filtered)


Process "Synthesize - XST" failed

 

 

I'm compiling it for cRIO 9082 in LabVIEW 2013.

 

any help?? How can I understand what is there in "line 301" !!

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Which versions of all the software are you using?

LV

FPGA Mod

RT Mod

RIO Driver

Compiler tools

 

What's the LV window say about the failure rather than an excerpt from the logs?  Has this ever compiled for you?

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LV 2013 SP1 f2

FPGA Mod 2013 SP1

RT Mod 2013 SP1

RIO Driver 14.0.0

Compiler tools 14.4

 

Yes, I have compiled this before also, no error was there at that time. Now I removed the case structures and the first memory read option, and it compiled!!

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