FPGA compilation problem

[tommpogg]

Hello Frank,

Thank yuo for your answer.

I do use a FIFO in my design but its size matches the data I am pushing through.

Anyway I forgot to mention something important: the code I am trying to compile was written using LabVIEW 2010, that was able to compile it successfully.

Problems started after I migrated to LabVIEW 2012 (I ported the code on a new PC with another fresh installation of LabVIEW).

I wonder if this could be the cause of my compilation problems.

Regards

[Nick-A]

Hi tommpogg,

This could definitely be the issue, but I agree with Frank.  We recommend customers to start a new thread instead of posting on an old one. This will ensure maximum visibility and helps us separate issues and keep better count of where we can do better.  I appreciate your understanding.

Feel free to link this thread to the newly created one to use as a reference for explaining your issue.

Thanks,

Nick