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FPGA VI reference issue

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Hallo guys,

 

I have a question/problem regarding FPGA VI references.

 

My situation: I have state machine on my real time system, calling different bitfiles successively. Lets break this down into only two different bitfiles.

 

In state 1, I call one bitfile and I am reading analog values and I use I2C.

 

In state 2, I call one bitfile, reading the same stuff like in state 1 and additionaly I do other stuff on the FPGA.

 

Since I use many subVIs on my RT system, my FPGA references are bound to 2 different type defs, so that I do not have to update the "FPGA VI reference"- indicators and controls by myself, if I use a slightly updated bitfile version. But now I have a problem, if I use the same "read I2C" subVI for bitfile 1 and 2 it does not work, since the type def controls are different. If I bound both bitfiles to the same type def,  I get a red coercion dot at the subVI input and the read/write functions inside are not working.

 

Does anyone have an idea? I dont want to copy the subVI and exchange all the reference indicators inside...

 

kind regards

Slev1n

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Message 1 of 15
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Use dynamic FPGA references (configure the Open FPGA VI Reference to use "Dynamic mode"), and create the SubVIs with an FPGA reference that only uses the subset of the FPGA interface needed in that SubVI.

See here: http://zone.ni.com/reference/en-XX/help/372614J-01/lvfpgahosthelp/fpga_dynamic_host_interface/

 

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Message 2 of 15
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Maybe I am wrong, but if I change to dynamic mode, first, I will have to replace all "FPGA VI reference"- control and -indicator in all SubVIs with controls/indicators build from the "Open FPGA VI reference" output and second, if I make a new bitfile and open it with the "Open FPGA VI reference" function, I will have to replace all of the controls/indicators of the subVIs again, right?

 

Due to the second thought, this is not applicable in my opinion, since I am in the development state.

 

kind regards

 

Slev1n

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Message 3 of 15
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Solution
Accepted by topic author Slev1n

Well, you can't have both...

You could cast to dynamic type only where needed (before your shared subVIs like I2C), and use the static references for the non-shared subVIs.

You could use a typedef for the FPGA ref in your I2C subVI (with only the common subset used in the subVI), and use the typedef also for the cast function.

 

 

Message 4 of 15
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Well, I am afraid, that you are right.

 

I am not sure how I can cast from type def FPGA reference to dynamic mode programmatically. The dynamic interface cast, doesnt work...Is there another function/way to do it?

 

 

kind regards

Slev1n

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Message 5 of 15
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You can only cast the reference if it is already dynamic. You can open it in dynamic mode, but still work with a typedef'd reference in all subVIs, just use a different (reduced) reference for the commonly used subVI.

 

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Message 6 of 15
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First of all thank you for your patience.

 

To be honest, I am at a total loss atm.

 

If I use "Dynamic mode", I dont know how it is possible to connect the reference with the input of the subVI, which has a type def'd control as input. The wire is always broken.

 

I am not sure how to make a quick example-VI of what you mean, but a picture would be enough (so, no need to upload all the other stuff, too)

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Message 7 of 15
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I created a simple example.

The Main VI opens a FPGA reference.

SubVI1 uses a typedef'd reference corresponding to the full FPGA interface (in this case 2 FIFOs).

SubVI2 uses a non-typedef'd reference with only a subset of the FPGA interface (in this case 1 of the 2 FIFOs)

The simplified reference is created by right-clicking the Refnum > Configure FPGA VI Reference... Then remove the unneeded elements from the interface.

 

 

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Message 8 of 15
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I should have told you, that I have LV 13.0.2f. Cant open LV15 version. Could you save it for an older version? And thank you for your time!

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