FPGA Tick Count Express VI work in timed loop that is externally clocked?

[D*]

When the Tick Count Express VI returns units of ticks, it doesn't matter what clock domain it is running in. When it returns ms or us, it must convert ticks to time.

Can this code block return accurate ms or us, in a external, variably timed loop?  (or Does it query an independent master clock?)

[Tirmizi]

what do you mean by external variably timed loop, can you explain it. also attach the image of your vi to understand the problem

[D*]

External clocking of the FPGA is a FlexRIO specific ability.  I'm using an NI 5734 module with a PXIe-7962R FlexRIO.  I'd like to timestamp the samples as they come in, with the correct time.

From the Clock Select example (see below):

The sample clock for the NI 573x is sourced from the adapter module. To ensure proper operation, the analog input I/O nodes for the NI 573X must be accessed in a single-cycle timed loop configured to use IO Module Clock 0. 

In this case the IO Module Clock 0 can be sourced from an external terminal of the ADC module, and can have variable timing.

So does a Tick Count (us) in AI loop rely on knowing the ticks/second of the clock domain that it is in (which can be variable in this case)?  Or does it use the FlexRIO's master 200 MHZ or 40MHz reference clock?

I guess the safest would be just to have a Tick Count (us) running in a 40MHz loop, and then just read the latest value via local variable in the AI loop.

[Tirmizi]

as far as i know the tick count are calculated use the FPGA own clock like 40Mhz , etc. i use 9269 with CRIO 9112 chassis to sample audio singal at sampling rate of  100KHz . for this the tick count i calculated for sampling duration  is by using the FPGA own clock