FPGA - MyRio Coding Sanity Check

[Raptorial]

Thank you for taking the time to consider my question in advance. I am midly familiar with labview programming; however, this is my first attempt at an FPGA program. I am hoping someone can give me insight to see if this approach is sane or if anyone has some solid examples I haven't come across yet.

I am currently using the MyRio-1900 device (http://www.ni.com/pdf/manuals/376047a.pdf). I am making use of the MSP Side C connector, due to simplicity. The overall goal of my code is to produce a sinusoidal analog output waveform (up to 6kHz in frequency) that will drive a speaker. The speaker produces the sinusoidal signal and that sound is then captured by a microphone, which relays the information back to the MyRio device. Both the generated signal and captured signal are then displayed on a plot. From this information I plan on investigating time delays and RMS Voltages.

Due to the high sampling rate needed (at least 50kS/s) and my code "running late" when using the megahertz clock on the MyRio device in a timed looop (non-FPGA), I believe I need to program information at the FPGA level. I watched the videos located at: http://www.ni.com/tutorial/14532/en/ . However, I am still running into some issues. I've attached two .png files that showcase my code thus far. I am not sure if I need to work on a FIFO approach, or if what I currently has is sufficient.

I have also tried to run the read/write on the FPGA in different while loops in parallel. I've also tried setting the timing for the event, which would help with the dt on the build waveform function. However, I can't seem to get a reasonable dt value for my build waveform function. I am not sure if it runs off the 40MHz clock speed or on the actual time I am telling it to run. I would greatly appreciate if anyone could double check my code sanity or if someone has a solid example I have failed to find.

Thank you for your time and assistance.

[nathand]

I've done a fair amount of FPGA programming but have not specifically use a myRIO.

The first problem is, why are you doing unnecessary numeric conversions? That will likely mess up your sine wave output. The output from the sine wave generator is an integer, and the analog output expects an integer, so why convert to a fixed-point in the middle?

The FPGA will run much faster than your host code. To catch every sample from the mic and sine wave generator on the host side, you'll need to use a DMA FIFO.

The sine wave generator runs at the FPGA top-level clock frequency and the frequency of the sine wave it generates should be correct (although the units of period/tick where the value is expected to be much less than 1 is a little weird). However, there's no guarantee that you'll catch every sample that it generates, since your loop runs slower than the top-level clock frequency - so you'll get something that looks like a sine wave, but with a few points missing.

[VItan]

You have no timing control in your attached diagrams.

On the FPGA, you are only checking the current clock time (probably in microsec, based on the name of your control - check the configuration of your Tick Count block to see if it is ticks, microsec, or msec), but not controlling the rate at which that loop runs.  Therefore it might be running at 40 MHz (but not sure), but its only checking the difference in microseconds between iterations - this would be zero 39 times out of 40 if this is the case.

On the host side, you are running a tight loop polling the values from the FPGA.  You don't know when you are actually doing the sampling from the FPGA, and you do not get every point that was ever generated.  Since your host isn't going to be able to run and poll the values from the FPGA at the same rate that the FPGA will be generating them, you won't be able to get every point unless you use a buffer.  If you don't need every point from every iteration of the FPGA's loop, reduce (and control) your sampling rate.