Hi Troy
I’m not sure if I can answer this question. The way I’ve done it up to now is a FFT and at this point in time, that means on the host computer as one of the NI 5640R examples shows. Unfortunately, I don’t have any FPGA code to implement an FFT algorithm using fixed point math.
If you post it in the NI 5640R discussion area, someone monitoring the board may have an idea. The method will most likely be tailored to the type of modulation that the signal you are getting is coded in, as well have a guess at the signal’s modulation rate.
As for "creating a smoothing capacitor mathematically", that is essentially a filter. As of now, there are two methods, using the Digital Filter design Toolkit, or creating one from scratch in fixed point math for the FPGA.
There are a number of good books in this area. One I recommend is "Understanding Digital Signal Processing" by Richard G. Lyons. The book I have is 1997.
He also goes into the best description I have read on IQ down conversion / up conversion and the math behind it.
Jerry