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FPGA Compile error - Actual of formal out port cout cannot be an expression

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Re: FPGA Compile error - Actual of formal out port cout cannot be an expression

‎02-22-2015 01:46 PM

For info. Just sticking a shift register between the FXP reinterpret and the output terminal allows the compilation to continue.  I'd file this one under "bug".

 

I faced this problem, and the solution (of sticking a simple feedback node) solved my problem. Just wanted to say a big thank you to Intaris for saving me a lot of debugging time!

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Re: FPGA Compile error - Actual of formal out port cout cannot be an expression

‎02-22-2015 01:46 PM

For info. Just sticking a shift register between the FXP reinterpret and the output terminal allows the compilation to continue.  I'd file this one under "bug".

 

I faced this problem, and the solution (of sticking a simple feedback node) solved my problem. Just wanted to say a big thank you to Intaris for saving me a lot of debugging time!

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Message 12 of 12
(390 Views)
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