Example vi: "Timed Loop Mode.vi" needs review

[heel]

There appears to be inconsistency between the actual code and the associated comments in the example vi named "Timed Loop Mode.vi". distributed with LV2014sp1.

• In the  context help it says: "The receiver loop is starting with an offset of 100ms delay.. ".
  According to the code this is incorrect. It should say 1000ms, not 100ms..
  
  
• In the comment on the block diagram is written: 
  "the Receiver Loop will continue to maintain the same phase (50 ms) against the 1 kHz clock as specified in its Timed Loop configuration.".
  This appears not to correspond to the block diagram where both loops have 0s offset by having un-wired t0 input terminals thus defaults of 0s. In addition, the offset port is not even made visible adding further to the inconsistency.

These comments in the vi are there to point out important aspects meant to be illustrated by this example vi. For this reason, they should be accurate otherwise it just causes confusion.

Finally - The effect of having an offset difference (t0 input) between the execution instant of the two loop's is not very well illustrated by this example, yet the comment brings this out as an issue to observe.

[Bozhidar]

Dear heel,

Thank you for the excellently documented feedback!

I have created a CAR (#524160), for which our R&D team will be notified. 

Next time consider creating directly a Service Request. Then for sure we will notice it and take it into account.

Thank you!

Best,

Bozhidar Uzunov

Applications Engineering

National Instruments

[ChrisStrykesAgain]

CAR 524160 was fixed in LabVIEW 2017. See the 2017 LabVIEW Bug Fix List for details: http://www.ni.com/product-documentation/53584/en/