Error code 63003..while running a FPGA prog on Host PC using FPGA reference VI

[LabWiz]

Hi,
when i run my FPGA program on HOST PC using a FPGA reference vi on windows platform, I get an error code 63003 (FPGA bit file out of date). When I go back, recompile and run the FPGA program on the FPGA target, then shut it and come back to HOST PC and run my application with FRGA Open refence vi, it runs with out any error! Does any one know why I get that error code 63003

[Christian_L]

This error means that the VI which is downloaded to the FPGA was changed on the host/development system, but has not been recompiled. By recompiling it you resolve this problem.

When a LabVIEW FPGA VI is compiled for the FPGA, the bit stream, which will be downloaded to the FPGA, is stored in the VI file. When LabVIEW RT or LabVIEW Windows attempts to download the bit stream to the RIO card, it makes sure the bit stream corresponds to the VI source code in the same file. This is necessary so that the host application can properly communicate with the VI on the FPGA. If the two are not the same, this error is generated from the Open FPGA VI Reference function in the host application.

Christian L
NI Consulting Services

[LabWiz]

Thanks Christian!

So the FPGA has to be compiled (after all changes) before calling/using it on HOST PC using Open Reference VI. I was wondering if an application has been developed on FPGA target, but not compiled and if directly called on HOST PC using "Open Reference VI" and run it, doesn't it compile and generate the bitsteam on FPGA target and use it on HOST application ?

I am relatively new to FPGA programming, so trying to grasp some fundamentals

Thanks

[Christian_L]

Yes, the VI that will be running on the FPGA needs to be compiled separately before you start running the host VI. The host VI will not compile the FPGA VI, and instead you will get the error message you are seeing.

Because the compile process takes several minutes it is normally advisable to develop and test the FPGA VI before integrating it into a host application.

Christian L

[Anonymous]

Hi ,

Im accessing a fpga vi through a host applikation and everything works
fine and works properly.
But when i create a shared dll from host app. + fpga vi
and try to run my programm in LabWindows using a CIN ,i get error
63003.
I recompiled the fpga vi several times, with no Result ,still error
63003.

I'm out of ideas by now.

greetings Alex

[Anonymous]

Alex,

I tried to reproduce your error, but everything worked fine for me
here. I built a simple LV FPGA VI and then a wrapper function in LV to
call the FPGA VI. I compiled this to a DLL in LV and then called the
DLL from a simple application built in VC++.

Make sure you rebuild the DLL in LabVIEW after recompiling any changes
in LV FPGA. Can you describe your system setup in a bit more detail?
What arrangement of computers (PXI, desktop, laptop) are you using?

Please feel free to post a simple example of your LV FPGA VI and LV
host application.

Christian L
NI Consulting Services

[Edrick Ablola]

I am experiencing the same error when trying to run the NI 1450 Open FPGA Utility VI for the CVS 1456 Compact Vision system. The CVS requires these utilities to be able to configure the DIO ports on it.

I have no LabVIEW FPGA Module installed on my PC, do I need to install this software package?

[Dmacs]

ChristianL:
Can you post this example code that you wrote?

Thanks

[Colin hughes]

I have been trying to do this with Borland but I do not get a response from the FPGA vi.
I assume that the FPGA vi and host vi are conpiled in the DLL.
I can add the Host DLL to a Labview Project and it works OK but I get no response when used in Borland C++ Bulder 5.
I added some none FPGS code to the host vi and that part works OK.

Glad to here it work in MS but I am still puzzled why I cant get it work in Borland.

I have to use borland as the DLL is needed for an excisting project.

Info
Use c calling convention.
Box ticked to include vi in DLL (so there should be no external vi needed)

Rem out include for another header in the host.h header file.
Forgot the name but I think it is for cins an
d there is nothing in there I need.

Used implib (In Borland bin directoy, copy to file dir)

implib -a mylib.lib host.dll
This creates the correct lib file for Borland.

My FPGA is left running after running Host in Labview so I can see Dig out put on scope

My simple test Vi ajust the delay or logic width from a trigered delay pulse.

The FPGA is still running when running DLL from Bprland but I can not change peramters.

Need help here.