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Error -200279 with simultaneous analog input (different devices) and digital output.

 

I have attempted to implement the Export Signals VI, am I doing this correctly? Also if I wish to share a trigger as well I assume I would need another export signal vi. I was not sure if I had to wire the task out from the signals vi anywhere.

 

Thanks

 

 

 

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Hello,

 

You're on the right track, but there are a few changes that need to be made.

 

1.  Instead of branching your task handle to the Export Signals VI, have the task handle go directly from AI Temp TC to the Export Signals, and have the output of the Export Signals go directly to the Sample Clock.  This way we avoid having a dangling task handle.

 

2.  The SC1 cannot connect its Sample Clock to the PFI line of Dev1.  It needs to connect its Sample Clock to one of the PFI lines on the front of the SCXI-1600.

 

3.  The Dev1 task is set up correctly, but from the way you have chosen Dev1/PFI1 on the sample clock and the Export Signals VIs, I think there may be a misaprehension.  There is no way to route your sample clock internally through the 1600's USB line to your PCI device.  You will need to physically wire a BNC cable coming from the PFI line of your SCXI chassis to a PFI input on your PCI card.  If your PCI card only has a screw-terminal breakout box, you will need a BNC to bare wire cable or some other means to connect the two terminals.  While it's fine to accep a sample clock on PFI1, there is no way to actually get the sample clock there without a physical wire connected to that terminal.  You can check your device's pinout in the manual to see which pins correspond to the PFI line.  The + wire of your sample cable should connect to the PFI line, and the - wire should connect to digital ground.

 

4.  So long as we start the slave task (PCI task) before the master task (the SCXI task, since this is the one exporting the sample clock), you will not need to export any triggers, as the former will just trigger off of the latter's first sample clock pulse.  To ensure this starting order, use flat sequence structures as shown below:

 

Untitled.png

Regards,

David R
Systems Engineer
National Instruments
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