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Joebui
Posts: 12
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Digital Logic design

Hi

I'm new to Labview. I'm doing a thesis project which simulate IC 74LS112, 74LS90, etc.... First, to simulate decade counter (74LS90), I created JK- flip flop (74LS112) which use multiple logic gates. Then I used JK-FF to build 74LS90 following datasheet of the manufacturers but it didn't work. After searching on the forum, i know that i can't design these IC using multiple logic gates because of bugs or something i dont know. So I need another way to complete my project. Does anyone have any suggestion or ideas? I'm stuck and don't know where to begin. Thanks.

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ajmartin
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Re: Digital Logic design

You should probably post this question on the multisim forum?

 

Alan

Member
Joebui
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Re: Digital Logic design

Thanks for your reply but i'm using Labview to simulate not Multisim.

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altenbach
Posts: 22,876
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Re: Digital Logic design

As you probably know, LabVIEW is a programming language, not a circuit simulator.

 

Still, LabVIEW would be fully capable of doing any circuit simulation if you don't shy away from a bit (possibly quite a bit!!!) of programming. :smileywink:

Since you are new to LabVIEW, this will not be easy. You should start with some tutorials, study the shipping examples, then try to design your program.

 

 


Joebui wrote:

After searching on the forum, i know that i can't design these IC using multiple logic gates because of bugs or something i dont know.


 

If you don't know something, you probably should not throw out unfounded and unverified accusations. Not everything you read on wikileaks about LabVIEW is true. :smileysurprised:

 

There is no "can't" in LabVIEW! Even if there is a bug (and I doubt there is!), there will be workarounds.

If you found a thread that describes that there is a bug, please provide a link to that thread.

Do you have a CAR #? We need information! Thanks!

 

 


LabVIEW Champion . Oh, by the way, I work for peanutsKudos .

Member
Joebui
Posts: 12
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Re: Digital Logic design

Thanks for your reply. You're person who I'm looking for :smileytongue: I already post 1 message before but since no one try to help me, so i have to post this one. I'm sorry if i say something wrong but I do really need your help. 

I built JK-FF which use multiple logical gates and it works. Then when I put 2 individual JK-FF in the same diagram with invididual Clock and Led, I found that the Led of the second JK-FF active when the clock is 0 and the first clock is 1.

Member
Joebui
Posts: 12
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Re: Digital Logic design

I'm sorry that I forgot to attrach my vi. I spent a week to solve it but I still dont understand why. Now I'm trying another way but it take much times than the old one.

Knight of NI
altenbach
Posts: 22,876
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Re: Digital Logic design

[ Edited ]

 


Joebui wrote:

Then when I put 2 individual JK-FF in the same diagram with invididual Clock and Led, I found that the Led of the second JK-FF active when the clock is 0 and the first clock is 1.


 

Since your JK-FF subVI and it's subVI both store data in feedback nodes, you need to make them reentrant (VI properties...execution), else all calls use the same instance and the code interacts in an unpredictable way that depends on the call order.

 

(I have not verified your code and I will refrain from any comment. I also cannot test because you forgot to attach one if the subVIs. What is the toplevel VI? Why is there no while loop?)


LabVIEW Champion . Oh, by the way, I work for peanutsKudos .

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Joebui
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Re: Digital Logic design

Oops. I'm forgot one. From the beginning, I simulate these flip flop following the theory, that's why there's no while loop. First, I built 2 binary counter which using 2 JK-FF following the theory and i didn't work. I though my JK-FF has problem, so I tested them individually in the same block diagram and i found that second one works when the first one works.   

Knight of NI
altenbach
Posts: 22,876
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Re: Digital Logic design

 

 


Joebui wrote:

I simulate these flip flop following the theory, that's why there's no while loop.


 

I don't know why you think one precludes the other... :smileywink:

 


Joebui wrote:

First, I built 2 binary counter which using 2 JK-FF following the theory and i didn't work. I though my JK-FF has problem, so I tested them individually in the same block diagram and i found that second one works when the first one works.   


I don't know what "didn't work" and "works" means in this context. Since there is no data dependency between the two calls, the execution order is not determined and the label "second one" and "first one" is completely meaningless. You cannot tell what executes first (LabVIEW does not execute left to right unless there is a data dependency imposed execution order).

 

You cherry pick one scenario and say it works, but for a complete understanding of the problem, a more complete description is needed.

 

 

  • What is the definition of "works"?
  • So we know that the second one works if the first one works? Under what conditions does the first one not work?
  • Which call do you think is the first? Why?
  • Does or doesn't it work now?
You ignored my comment about reentrant settings. Did you try to set D-FF.vi to reentrant to see if it makes a difference?
Several levels of your subVIs have uninitialized feedback nodes, meaning they contain data from previous runs. It also means that they retain state that depends on earlier execution (or earlier calls). The results matrix of "works" vs. "doesn't work", thus also needs to include information on previous states.

 

 

 


LabVIEW Champion . Oh, by the way, I work for peanutsKudos .

Knight of NI
RavensFan
Posts: 13,235
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Re: Digital Logic design


Joebui wrote:

Thanks for your reply. You're person who I'm looking for :smileytongue: I already post 1 message before but since no one try to help me, so i have to post this one. I'm sorry if i say something wrong but I do really need your help. 

I built JK-FF which use multiple logical gates and it works. Then when I put 2 individual JK-FF in the same diagram with invididual Clock and Led, I found that the Led of the second JK-FF active when the clock is 0 and the first clock is 1.


You actually were getting help in your other thread and that was before you started this thread.  So don't say that no one tried to help you,

Please don't start new threads with the same question.  It just divides up the answers you are getting and wastes the time of the people who are trying to help.  If you don't think you got a satisfactory answer in your earlier thread, then ask the question again in the same thread adding any additional detail that might help clarify your question.

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