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Difficulty running 9505 example for cRIO

Hello,

 

I recently set up the cRIO system.  I am trying to execute the Position Control (closed loop) - NI9505.lvprog but I am having difficulty.

 

I find the example > save as (including dependencies) > close and reopen saved project > import FPGA target > transfered:

 

(FPGA Target Hierarchy)

- Analog Input folder

- Digital Line Output folder

- Digital Line Input folder

- SubVI

- Position Control (closed loop) - NI 9505 (FPGA).vi

- Memory

 

(Local Chassis Hierarchy)

- Position Control (closed loop) - NI 9505 (RT).vi

 

> transfered > removed example project.

 

The FPGA VI has a list of errors and disconnections. I refreshed the reference in the RT VI but it needs the FPGA VI to compile. Am I supposed to transfer Build Specifications? If so, how?

 

Thank you for your help in advanced.

 

Dan

 

 

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Dan,

 

This example (and most other examples that have FPGA targets) doesn't include a pre-compiled FPGA bitfile, which is why you are seeing a broken host VI.  The reason for this is that a compiled FPGA bitfile is only compatible with the specific FPGA target from which it was compiled.  In this case, the example uses a cRIO-9103 FPGA target, so including a compiled bitfile would only be helpful if you are using a cRIO-9103, which is unlikely considering the number of FPGA targets that are available.  What you will need to do is create a new FPGA target that matches the device you are using, then you can compile the FPGA VI by clicking its Run button from inside that FPGA target.

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To be a little bit more specific I am using a cRIO-9024 controller and when I import my target, it shows that I am using a 9118 FPGA target on the chassis.  The example is using a cRIO-9103 Target.  I don't think that is my issue, since I dragging the 9103 example target into my 9118 fpga target.  

 

Perhaps the reason is that MAX cannot find my remote device?  Which doesnt make any sense because I am able to run RT ScanInterface applications using the Starter kit.

 

Another example I am trying to run its the Offline Traj - Pos Cntrol (open loop) - NI 9501.  In this case, it is using an FPGA target of 9104.  For this cause, I am not getting disconnection errors, rather I am getting an error when running the RT VI

 

==============

Access denied: This target is running a version of LabVIEW Real-Time that is different than the Real-Time Module software on the host computer.  You can verify the version and reinstall the Real-Time software using Measurement & Automation Explorer.

==============

 

I am trying to solve this issue and shortly realizing that my MAX is not recognizing my controller

 

Could these issues be linked?

 

Daniel

 

EDIT:  For the latter example (9501), I see that there has been a folder made named "FPGA Bitfiles" where I Save As my project. And the previous 9505 example, I don't see that folder.  That can be a clue why the 9505 example isnt working.

 

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In my previous post, I mentioned an "Access Denied:..." error.

 

I have fixed this issue, but I am still getting not able to run this example.  I understand that the example is not specific to my Target.  I add a new target and drag the appropriate files, as mentioned in the original post.  When I do this, does it not create a bitfile to allow the example to run on my target?

 

Attached is a snipit of my project.

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Dragging the appropriate files to the new FPGA target will not automatically create a new bitfile.  To compile a bitfile from an FPGA VI, you can click the run button on the FPGA VI.  You can also do it by selecting the build specification, then right-click and select "Build".

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Hello again,

 

I cannot run the VI at all, please see the attached picture - it does not build anything.

 

Secondly, I have attached my project setup (left) and the example (right) in this snipit.  I am not able to drag the Build Specifications, mentioned in the original post.

 

Daniel

 

 

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Gelman, 

 

The most likely reason as to why you cannot run the VI is because of the 25 listed errors. I would suggest reading through the details listed for each error, and then double-clicking on each one in order to locate the source and then proceed to fix each one.

 

The few that we can see appear to be very generic, referring to broken wires or certain required terminals not even being wired at all. 

 

For others that you are unfamiliar with or do not know how to go about resolving them, we have an extensive database full of articles and forum posts addressing a large majority of errors. Try searching for these errors on www.ni.com and take a look at any and all of the results that come up. 

 

 

Huntington W
National Instruments
Applications Engineer

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The_Hunt

 

Thank you, but I know there are errors.  I was under the impression that taking an example from "Find Examples" and trying to configure it to your own controller and FPGA is what cRIO can perform.

 

All the wires that are disconnected related to the FPGA IO Nodes (read from, or writing to).  I am missing one step to allow these FPGA nodes to communicate correctly.  I listed all the steps I have done, is there anything that I did wrong or am missing. 

 

Thank you

Daniel

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Gelman, 

 

Thank you for clarifying where the errors are being spawned from. To make sure that a particular step was not missed, here are some steps for the entire process and some helpful links.

 

To start, here is an article on adding a new cRIO to a blank project. This is an excerpt from a larger tutorial, but we're mainly interested in adding the cRIO (the sections entitled "Starting a New CompactRIO Project in LabVIEW" and "Select the Appropriate Programming Model." 

Once you've completed adding your cRIO to the project, you'll want to copy the directory where the 9505 example is stored. This is so we don't modify the shipping example. 
Once the directory is copied, open the copy example project side-by-side with your new project (with your cRIO in it). 
Click and drag the files from the example project to their analogous location in the new project (i.e. at the same level under the cRIO, such as under the chassis, controller, FPGA, etc.). 

 

(It appears you have already done most all of this)


Now you need to ensure that the module and I/O references in the code are associated with the correct project items in the example VIs and run whatever the main project VI is (you probably want to save the project at this juncture). 

 

In order to associate with the correct items, please refer to this discussion post, particularily the last entry at the bottom. Martijn has included images to demonstrate this action. 

Huntington W
National Instruments
Applications Engineer

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