I'm wondering if it would possible to use the Labview FPGA tools to generate a bitfile compatible with a custom board. The custom board would use the same FPGA chip as a 9606 sbRIO (LX45 Spartan-6). Obviously I won't be using DMA or other FPGA-CPU related IP blocks, as I do not expect the to work. But if I just plan to use DIO, provided that the board is clocked at 40MHz, would it be possible to just change the relevant NETs in toplevel_gen.ucf? Can I expect some support from NI in this task?
Thanks.
Luca
