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DMA FIFO or Front panel communication

Hi everyone,

 

I'm making a LabVIEW project with communication between a PC and a cRIO.

The communication between my PC and real-time controller is realised with a network stream in a message/command structure.

But now I have to send some fixed point data from the real-time controller to the FPGA.

Based on the command from the user, there are 3 different groups of 4 fixed point values to be sent( The parameters of 3 PI-controllers = Kp, I, max value, min value ). On the FPGA I only need the latest values.

Is it better to use a DMA-FIFO with an extra fixed point at the start to indicate what group of data is sent? Otheways the FPGA doesn't know what PI-controller to update.

Or should I just use front panel communication to do this?  

 

Thanks,

Matthias

 

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For expandability reasons, I would use the DMA.  That way if you need to add another set to the FPGA, your RT will see little to no change.


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And when I use the DMA, should I use a starting Fixed point number to signalise what PI-controller needs to be updated or is there another way?

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The extra number would be the simplest way.


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