DMA FIFO Host RT to FPGA

[Junli]

Hello everyone,

I need a DMA FIFO host to target FPGA between a PXI-8106 and a PXI-7852R, I am working under Labview 14.0.1 

I need to know the available spaces before writing in the FIFO to avoid overflow, but I can't find a VI which can do this, the only way I know to get the available spaces in the FIFO is creating a invoke method <write>, but that means I have to write date before knowing the available spaces. 

Then I tried a another VI, <FIFO.Acquire Write Region (Invoke Method)>, but I got a error:

L'erreur -63193 s'est produite à : Invoke Method: FIFO.Acquire Write Region in cerclefifo v10 invoke referencev2.vi

Raisons possibles :

NI-RIO: (Hex 0xFFFF0927) The requested feature is not supported.

I think that means my embedded controler is not supported by FIFO.Acquire Write Region (Invoke Method).

Do you hace some ideas how to solve this problem?  Thanks a lot.

[speleato]

Hi Junli,

You can actually do a zero element write, which will return the number of empty elements in the DMA FIFO buffer. We document that here, http://digital.ni.com/public.nsf/allkb/583DDFF1829F51C1862575AA007AC792, for the read case. I did a quick search and couldn't actually find a document that covers the write case, but I'll update if I do.

Sebastian

[Junli]

Hi, Sebastian

The link you posted isn't accessible now, can you check it please?

Thanks

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speleato a écrit :

Hi Junli,

You can actually do a zero element write, which will return the number of empty elements in the DMA FIFO buffer. We document that here, http://digital.ni.com/public.nsf/allkb/583DDFF1829F51C1862575AA007AC792, for the read case. I did a quick search and couldn't actually find a document that covers the write case, but I'll update if I do.

Sebastian

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[Paolo_P]

Hi,

The error is due to the comma at the end

http://digital.ni.com/public.nsf/allkb/583DDFF1829F51C1862575AA007AC792

[dan_u]

The new link you posted isn't any better...

http://digital.ni.com/public.nsf/allkb/583DDFF1829F51C1862575AA007AC792

[Junli]

Thanks, everyone, for a FIFO DMA Host to target, there are few examples, I will try to write a empty array in order to query the space avaible in the FIFO on the host side.  

[Junli]

This is my VI on the Host.

I use a while loop to quiry the space avaible in the FIFO until at least half of the FIFO is empty, then I write date into the FIFO

[Junli]

[speleato]

Hey Junli,

That looks like the right idea, did this sovle your problem?

One thing I noticed is that the loop timer is outside of the polling while loop, so it's not actualy controlling the polling rate. I think you'll want to move it inside the loop or delete it if your intent is to run the polling loop as fast as possible.

Sebastian