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Counter in FPGA - reset

Hello,

I have in problem in LV FPGA.

Basically, one singe cycle timed loop detects positive and negative edges of 2 digital signals and counts them.

A second loop runs at (let's say) 1kHz and acquires analog data. Every X times I get analog data, I want to get my counter value since the last time I got it and also the time since the last time I got it, in order to get the period of the singal later on.

 

So basically, I want to measure analog signals at 1kHz, and the period with a rate at about 100 Hz.

 

I attached my VI, which has 2 problems:

First, my counter does not seem to work! And I have no idea why, since it seems pretty correct to me, I hope one can help.

Although the boolean indicator if flickering, I get 0 all the time if I place an indicator to the current counter.

 

My second question: I would like to reset my counter every time I get the current value in by slower loop, but I do not know how to do that.

My try was to create a local variable "reset" (boolean), that becomes true every time the slower loop reads the counter value. In my fast loop, of course, I reset the counter to 0. However, I dont know how I should set the reset-boolean to "FALSE" after the counter was reset. If I do that in the fast loop, I get an error, that I cannot access the local variable twice within one cylce.

Anyone an idea?

Thank you for any comments.

 

Jack

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Hello Jack_W,

 

to the first question the counter are in parallel but they sould be in serial

 

Unbenannt.PNG

 

for the second i´m looking into the code.

 

 

 

best regards
Alexander
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Message 2 of 10
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Hello Jack_W

 

to the second question you can use a boolean LED and ony if a change from low to high happend reset the counter.

Setting and reseting from the LED could be done in the slower loop.

 

Unbenannt12.PNG

 

Hope this helps.

best regards
Alexander
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Thank you for your help, that helped a lot! The counting as well as the reset seem to work (better) now.

However, there must still be some issues:

 

 

As I said, I want to measure analog signals with a certain rate and with a certain factor slower read the counter values to calculate the period. This factor I determine by the  "fast/slow"-control

 

When testing the program, I attach a constantly rotating motor with encoder of which I want to read the rotational speed.

When I set "fast/slow" to 10, I get a realistic frequency that stays rather constant (which is fine since I cant be sure the motor rotates exacly constant).

When I stop the program, enter 50 for "fast/slow", the frequency increases quite significantly, so there must be something wrong with time timing or counting in my code.

Do you maybe have an idea?

Thank you very much

 

Jack

 

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I tried this with a frequency generator, 2kHz. The higher the ration "fast/slow" is, the closer the measured value is to the actual value. So with the ratio 10 (being 100 Hz), I measure 1800 Hz. With 20 I measure 1900 Hz and so on.

Thanks for any help

 

update:

When I do not reset the counter but simply take the difference between two times of reading the value, I mesure the exact frequency that I should.

So it must have something to do with the reset I suppose...

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Hello Jack_W,

 

have you tried do read out the counter directly without a minus from the previous iteration value?

 

Also please try the reset on different positions like in a frame after, or in the frame before where the timing is.

i think in this situation the position of the counter reset makes the bahaviour.

 

Hope it helps.

best regards
Alexander
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Message 6 of 10
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Hello Jack_W

 

the VI.

best regards
Alexander
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Message 7 of 10
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Thanks for your help, I tried to set the "reset" true in a frame, meaning first reading the current count value, than resetting. However this did not work better.

Unfortunately, I cannot open the vi, as I am using LV 2013 SP1, could you maybe save it for that version?

Thank you!

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Hello Jack_W,

 

the VI for 2013 and yes the position of the reset makes the behaviour. I have put the set to false in the timing frame.

best regards
Alexander
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Hello Jack_W,

 

the VI for 2013 and yes the position of the reset makes the behaviour. I have put the set to false in the timing frame.

best regards
Alexander
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