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I am usingLabview 2015 with cRIO 9063. The compilation tool is Xilinx Vivado 2014.4.
I am having problem with compiling my FPGA vi. Please find attached pictures of the error report. I am also attaching my FPGA Main.vi.
I am new to Labview, can someone please advise me the cause of the error and how to fix it? I believe this is caused by the numerous arithmetic function, am I right?
The error you are seeing is due to there not being enough slice LUTs (look-up table). Basically, you are using more resources on the FPGA than can physically fit on it. Like you said, one cause of this can be numerous arithmetic functionality. Other causes of overusing the FGPA resources are discussed in this link:
How Can I optimize/Reduce FPGA Resource Usage and/or Increase Speed?
You may also find some good information in the High Performance FPGA Developer's Guide. It gives many of the same suggestions as the KB linked above but goes into greater detail. Taking a quick look at your VI I would probably focus on multiplexing the PID logic. If you use the PID in a SCTL in addition to multiplexing you should be able to keep your loop rate pretty high as well.