Access to serial and ethernet port in FPGA for cRIO-9068

[dalyto]

hi

i want to know if i can Access to serial and ethernet port in FPGA for cRIO-9068 like camera IP

thanks for help

[Rscd27]

Yeah is completly possible,

Check this link:

https://decibel.ni.com/content/docs/DOC-30232/version/3

[dalyto]

thanks

but how i can i acquire image with IP camera and fpga ???

[BlueCheese]

I'm not sure about the serial port, but the Ethernet port is only accessible from the host CPU (RT), not FPGA. Additionally, you would run into issues because typically IP cameras use higher level protocols like TCP and compression schemes like JPEG or H264. All of these would be impractical to access from the FPGA.

The NI-IMAQdx driver can acquire from a few brands of IP cameras and then there are VIs provided to move the image down to the FPGA for processing if you want to do it there rather than the CPU.

[rolfk]

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@dalyto wrote:

thanks

but how i can i acquire image with IP camera and fpga ???

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The Ethernet hardware interface in the cRIO is not directly connected to the FPGA backplane in a way that you could directly access it. Even if you could it would be a pretty bad idea to try to do. A fully operational TCP/IP network stack implementation in the FPGA would not leave much resources for anything else even on the biggest FPGAs available. That doesn't include support for the typical image compression algorithmes which are even more complicated to implement on FPGA. Even if you would go to highly optimized VHDL code directly it would be a pretty difficult thing to do!

In fact implemenintg the MAC and PHY of an ethernet interface on the FPGA is totally trivial in comparison. The IP level could also be implemented fairly easily in the FPGA but anything above that is going to give you bad headaches and still will be very limited in number of connections and packet sizes it can support.