9225 and 9227 Module Constant Phase Shift (Drift)

[RafP]

Hi,

I wrote a large VI and am aquiring voltage and current with the 9225 and 9227. The phase of the voltage and current constantly drifts. Its not just out of phase a bit for the entire run; the phase constantly cycles from 0 to 360 degrees. I have an excel file with plots showing what I mean. Series 1 = voltage, Series 2 = current

I wrote a tiny VI to do the same thing with nothing extra. I didn't even add data recording. I just used a graph to plot the voltage and phase. The voltage and current were still off!

What do you think. Are the timers bad on the modules? Slow computer? DAQ Assitants aren't good? Im using the internal timers in the modules.

Synronizing in the beginning doesn't help because the signals would still go out of phase anyway later. The load is a piezoelectric tube.

Im using Labview 2011 and NI cDAQ-9178:
9225 3CH 300vrms 24-BIT Simultaneous AIN
9227 4CH 5Arms 24-BIT Simultaneous AIN

Cheers 

[RafP]

A coworker recommended setting up a master clock for the modules, rather than using the internal clocks.

Does anyone have any advice on how to feed a single clock to multiple modules on the cDAQ-9178?

I tried using the external onboard clock (Don't know what that is though) and I tried assisnging one of the modules sample clocks to the other module (It said it wasn't available to the other module)

???

Cheers 

[C-Dav]

RafP,

There are a number of reasons DSA devices can be out of sync due to the hardware in use that allows for such high resolution.  This is discussed in this document:

http://digital.ni.com/public.nsf/allkb/F989B25FF6CA55C386256CD20056E27D?OpenDocument

which also contains some methodology for handling the delay.  Have a look at that document and post back any questions that arise.

Regards,

[RafP]

If you look at my graphs, the phase mismatch between the voltage and current is not due to improper synchronization. The document you specify covers a consistent delay between two signals. So, say after 1 hour, the signals should look pretty much the same. My issue is that after two minutes, the signals can be 90 degrees out of phase already! The voltage and current cycle from 0 - 360 degrees and repaeat over and over.

My problem is that the modules have mismatched internal clocks, which causes the huge phase shift. I want to assign a master clock to both modules, but I can't figure out how to do it. Some documents mention how to set the master timebase for the 9225 and 9227, but the keep reffering to FPGA nodes and what not. I am not using any sort of FPGA or whatever this is talking about. 

I tried Figure 8 in this link and it didn't work.

http://www.ni.com/white-paper/11549/en

I can only access cDAQ1 clocks, but I can't access the Mod clocks. When I use the DAQ Assistant I can access all of the clocks in every module I have in the Chassis.

I will upload my VI. I want to set up one clock for both the 9225 and the 9227. Once that is done, I will verify if I need to have both modules start at exactly the same time. 

[RafP]

I am trying to assign the sample clock from Mod7 (9225) to the Mod8 (9227). I am not sure if this works. I am using PFI0 as a trigger.

I am trying to follow Figure 8: http://www.ni.com/white-paper/11549/en

This is what I did, but it doesn't work. I am not sure if PFI0 does anything or if Mod8 recieves the Mod7 sample clock.

I get this error:

Possible reason(s):

Some or all of the samples requested have not yet been acquired.

To wait for the samples to become available use a longer read timeout or read later in your program. To make the samples available sooner, increase the sample rate. If your task uses a start trigger,  make sure that your start trigger is configured correctly. It is also possible that you configured the task for external timing, and no clock was supplied. If this is the case, supply an external clock.

Property: RelativeTo
Corresponding Value: Current Read Position
Property: Offset
Corresponding Value: 0

Task Name: _unnamedTask<23>

I want both signals to be in sync the entire time, without any phase drift.

Thanks!

[C-Dav]

I'd try changing the acquisition mode from Finite to Continuous and do not specify a clock source at the timing VI.  Using Finite causes DAQmx read to acquire a set amount of samples and stop and then, once called again, throw an error.  Also, if you do not specify a sample clock, the drivers should select the proper one for you.  If your data is still not synchronized could post additional screenshots of the data from this code?

Thanks,

[RafP · Accepted solution]

I forgot to change to Continuous. I do that usually. The major fix I did was remove the "Start Digital Edge" trigger completely. The trigger was not working correctly with what I set it to, "PFI0"... Once I took it out, I got a sample overrun. I played with the sample numbers for the sample clock and the read. I'm not sure why using 25000 everywhere didn't work. But when I lowered the numbers to 6250 or something of this magnitude, the VI finally worked.

The VI works with or without the clock I specified (Mod7/ai/sampleclock), which is great news! Thanks for that tip!

The Current and Voltage are finally in synch. They never go out of synch! Finally I can calculate POWER!

That digital trigger was the worst headache.... Thank you for the tips!

I am posting the VI and snippet for my completed solution.