52005 error implementing IP node

[enapolo]

HI,

I'm trying to implement simple IP node, whic will work like and. I'm using DE FPGA board. I can compile it, but when I want to run it I have 52005 error. Can anyone help me? 

[RyanPoPo]

Hey enapolo,

Error 52005 usually occurs because you don't have Scan Engine installed when something in your projecct requires it. I have linked a Knowledge Base article on the error below.

Error -52005:

http://digital.ni.com/public.nsf/allkb/8A49034C699AA6FF862577D2007D9970?OpenDocument

I hope this helps.

Regards,

Ryan

[enapolo]

I looked this article before and try to install, but this board don't show it.

[RyanPoPo]

It sounds like something is not configured correctly with your IP Node. You may need to verify the IP Node parameters. I've included a few documents below for making sure an IP Node is configured correctly.

Using the IP Integration Node:

http://zone.ni.com/reference/en-XX/help/371599J-01/lvfpgaconcepts/ipin_use/

Preparing IP for Use with the IP Integration Node:

http://zone.ni.com/reference/en-XX/help/371599J-01/lvfpgaconcepts/ipin_prepare_ip/

Regards,

Ryan

[enapolo]

I made my IP using this documents. 

I add all project with .vhd file, maybe you can look or make new one and then I can try to implement.

Thanks for helpping 🙂

[Southern_Cross]

I am running into a simpilar problem all of a sudden. I have an FPGA VI that runs but I get the -52005 error when I reference it from RT using "Open FPGA VI Reference". I've been using this FPGA VI for months. I've made a change to the FPGA VI. I have made changes to the RT VI but I am not intentionally using the Scan Engine. So, why am I getting this error all of a sudden? I've never had to have the Scan Engine before? 

Is there a way to determine where the Scan Engine dependency is in the project/code?

[HizNI]

Are you gathering data from any modules in the RT program? Are you seeing the same behavior that is described in the KnowledgeBase article that was linked? Have you tried recompiling your FPGA code, and linking your FPGA VI references in the RT program to that new bitfile?

[Southern_Cross]

I reformated the cRIO and reinstalled all the software late last night. Everything is now working again. The system must have gotten into a bad state...