LabVIEW Real-Time Idea Exchange

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Simulate cRIO chassis for development away from the chassis

Right now, you can simulate the I/O from an FPGA target. Timing features and other hardware-specific VIs are not executed, but the code still functions and allows you to debug certain aspects of it without working through the compile process. It would be similarly helpful if you could simulate the real-time controller, or a cRIO in scan mode, with simulated IO. Again, the resultant VI will not be truly realtime, but it would allow useful development without having constant access to the cRIO.

 

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14 Comments
Member

 +1

 

Any news?

Active Participant

Hello everyone, 

 

Thank you for your interest and feedback thus far. We are researching how to provide this capability in a consistent experience with the simulation already provided for FPGA (where it makes sense, of course hardware compilation/concurrency/timing is different than for SW). Which of the following interactions would be required and which useful?

Deborah Burke
LabVIEW Product Manager
Certified LabVIEW Architect
National Instruments
Member

I agree with the comments in this thread. I am presently working with 3 cRIO chassis at work but cannot take the entire environment to another location. It would be extremely helpful to be able to simulate the Real Time cRIO chassis similar to the ability to simulate an FPGA environment. Has there been any movement in the NI areas to add this feature?

Knight of NI

If you agree, then you should click on the Kudo button (star next to the idea) to register your vote that you want this idea!