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InfiniteNothing

Add options for the for loop iteration integer size

Status: Declined

Any idea that has received less than 6 kudos within 6 years after posting will be automatically declined.

For FPGA programming, sometimes I want a smaller representation of the loop iteration terminal on the for loop mostly just to squeeze every last gate out of the chip. Other times I want the integer to be unsigned or larger to prevent saturation.

CLED (2016)
2 Comments
altenbach
Knight of NI

A related idea. (Read the entire discussion.)

Darren
Proven Zealot
Status changed to: Declined

Any idea that has received less than 6 kudos within 6 years after posting will be automatically declined.