When using external ram on the FlexRIO products it would be nice to have a memory map tool built into LabVIEW FPGA.
Many traditional FPGA release processes for companies require a memory map. Currently LabVIEW only allows the user to create memory partitions, but the user has no control on where the partitions are laid out in memory.
This can cause problems during the release process because the simulation is not repeatable because the memory element being accessed may be in a different location.
This feature will not impact the functionality of LabVIEW, but will make it easier to use LabVIEW FPGA in companies where Verilog, and VHDL languages were the only options for FPGA's and the release process is hard to change.
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