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Many data streams contain information for multiple channels or multiple samples. Today one must pack this data into larger integer types or interleave the data manually into multiple writes to the DMA FIFO API. It would be much simpler if the DMA natively support cluster and array data types. The local FIFO, Memory, and Register APIs already support this; extend it to DMA.
I was hoping someone would mention classes, but as one of the implementors of classes I thought I better not butt in and let someone else throw it out there : )
Those developing algorithms with parameters determined on the RT system yet implemented/executed on the FPGA will benefit a great deal from this feature!
I've been looking for the same functionality, would make coding much easier and understandable to the reviewers. In addition, it would be a 1to1 interpolation between FPGA and S/W. hopefully we'll see it at NI week this year, 2017
If you like the idea, then you should Kudo it! Click on the star button to the left of its title. The number of votes is one of the factors that determines whether NI feels it is worth pursing an idea.
