LabVIEW FPGA Idea Exchange

About LabVIEW FPGA Idea Exchange

Have a LabVIEW FPGA Idea?

  1. Does your idea apply to LabVIEW in general? Get the best feedback by posting it on the original LabVIEW Idea Exchange.
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  4. Watch as the community gives your idea kudos and adds their input.
  5. As NI R&D considers the idea, they will change the idea status.
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64 bit FPGA tick-counter

The Tick Count function in LabVIEW FPGA can represent time periods with tick count accuracy of up to 2^32 clock cycles, that is (using the standard 40 MHz FPGA clock) about 107 seconds.

Sometimes I need to handle longer time spans, and I use this example.

 

I suggest to implement a built-in 64-bit tick counter.

 

 

 

64bittick.png

  • Execution & Performance
3 Comments
Proven Zealot
Proven Zealot

A direct 64-bit clock will be very much needed. Kudos!!

Active Participant Dragis
Active Participant

i like the idea, but i think we should take it a step further and allow the user to wire a constant 'max count' into the node. the internal counter can then be optimized to use the fewest bits necessary to meet that criteria.

Member igagne
Member

This is useful regular labview too. A 50 day overflow is too short.