Reading values from fpga faster than the default resampling

[starkgray]

I'm looking at the example finder application "Quality Applications.lvproj" for the Electrical Power Suite for labview 2011.  I'm trying to read a single cycle voltage reading for 3 phase power using the vector measurement.  The example is using a "FPGA Resampling (60 Hz).vi" that appears to resample 12 cycles and send this to the realtime via DMA.  I'm willing to trade quality for speed and reduce the number of cycles used to buffer.

When I run the "Magnitude & Frequency.vi" I can change the frequency being displayed on the front panel, but the underlying FPGA code is still putting 12 cycles of data in the DMA.

What is the best approach to read "instantaneous" voltage?  Where is the EPM library setting the sampling of the resample block?

[QiaoGuo]

10-cycle time interval for a 50 Hz power system or 12-cycle time interval for a 60 Hz power system is required in IEC 61000-4-30, thus if you are performing power quality measurement, you can only specify the number of samples per cycle after resamling and you can not reduce the number of cycles used to buffer.

If you are performing basic power measurement without any standards compliance, you can use the VIs under "Basic Measurement" and leverage cRIO waveform acquisition library (http://zone.ni.com/devzone/cda/epd/p/id/6206). Thus you can specify and analyze more "instantaneous" voltage.