I am not at my work place now but here is some more info/thoughts. maybee by tomorrow you or I will have a idea of what can be wrong.
when I probed all of the data , address, rd and wr I was also looking at the timings. I didn't take down exact timings but in general it seems that I have quite a slack on the obvious parameters; for example the wr goes down before data is available and the wr goes back up (trailing edge) to lock the data. the data stays quite a while on the bus after the trailing edge of the wr signal. Also, don't forget that it seems like I am definetly writing and reading/verifying most if not all of the other registers; e.g the counter registers that you asked me to check. I've tried basic stuff way in the beginning like with pon not cleared, I sense no activity on the GPIB bus so I know I'm writing to that register (forget which one). Now that I am detecting my device at address 0, and I send the \x20 command, I read in the adsr that I am addressed to read, so I know I am reading that register and the others.
I am using the TMS320F2812 DSP from TI in case you think it may help you. Also, I was wondering, is it possible that if I was by some reason not entering one chip mode for something like this to occur, like if I was in the 9914 mode. I know that the registers are different, I don't have the registers table to cross reference.