I did not get around to using a scope but as far as I can determine the failure is not random (as you would expect if noise is involved).
When I read register values I get correct values, every time.
Do you know of any special considerations during the initialization phase? (such as order of operation, required delays, etc.)
Here is my initialization sequence:
send command 2 (chip reset)
set the clock (value 26H to ICR - 6MHz)
page in (50H) and read the chip version (from VSR)
mask with 0C0H and verify non-zero value for NAT7210
set minor and major addresses
set address mode to 31H (for TI SN75...)
set initial spoll value
set ppoll configuration
set auxa to 9CH (8 bits, EOI, EOS, normal receive mode)
set auxb to 0A2H (int, slow, spoll, eoi
, no cpt)
set auxg to 41H (ches)
send hldi command (51H)
set eos to 'LF'
set int mask 1 to 3FH
set int mask 2 to 7
page in (50H) and globally enable interrupts (write 80H to IMR0)
send command 0 (immediate execute power on)
Thanks.