Instrument Control (GPIB, Serial, VISA, IVI)

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Blocking read on GPIB bus, and CPU not tied up

Scott,

One thread is doing "iwrt and then ibrd" on a particular device at address 7
Another thread is doing the same on another device at address 8.

Is the driver in charge of managing the multiple accesses, is there a risk to tie up the CPU or no risk at all?
Do I have to create semaphore or is it already done by the driver?

Thank U for your help.
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Message 11 of 12
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The driver will keep everything straight. If you see otherwise, it is a bug.

Scott B.
GPIB Software
National Instruments
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Message 12 of 12
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