Accessing TNT-5002 Register Sets

[Collin M]

I think we may have found the issue here. Intel published app note at the following link

ftp://download.intel.com/design/network/applnots/30037501.pdf

The app notes says, among other things, that

"If an external PCI device has non-prefetch memory and requires either a 16-bit or 8-bit read, there is a possibility that the device will not respond correctly to the IXP42X product line and IXC1100 control plane processors’ memory reads. This is because the processors always perform a 32-bit read to the non-prefetch memory region specified in register PCI_NP_AD."

and

"For more information on 8-bit memory read transaction implementation, contact an Intel representative."

As I said in a previous post, accesses to the 4882 registers should be made using 8-bit register accesses. Accessing registers using a 32-bit access will have unreliable results.

In the same app note Intel does provide a workaround to perform 16-bit accesses; however, it requires a significant schematic change.

Please review the app note and let me know your thoughts. There may be some other workarounds but none will likely be trivial to implement.

[devguy]

Dear dittohead,

I modified one board for 8bit access, in line with the app note you suggested and, reading at PBAR1+0x117 I got that wonderful 0x4c we expected since weeks.

I do not catch the reason for such a constraint in the Intel processor, also because of the minimujm amount of additional resources required for full byte/word access compliance.

I want to thank you a lot for your prompt and skilled support that was really instrumental for us at this stage. 

Best regards