9144 EtherCAT Update Rate

[shansen1]

Hi everyone, I am in the process of designing an application that will make use of several 9144 EtherCAT chassis' for remote I/O. For this application I need a minimum of a 2kHz update rate with ~40-50 (16-bit) channels on the EtherCAT ring. After reading the EtherCAT documentation available on NI's website, it appears that the update rate is mostly limited by the master's Scan Engine because it is doing the processing in the real-time OS and not the FPGA.

I have also seen the EtherCAT benchmark here: http://www.ni.com/white-paper/52642/en/

Unfortunately this benchmark doesn't include the newer Compact RIOs. Does anyone have any experience with update rate on the newer Linux-based cRIOs (906x series, 903x series)? For those who have done this before, does 2kHz seem like a reasonable update rate for 50 channels (spread over 3-4 EtherCAT chassis') using one of these newer cRIOs?

[Miro_T · Accepted solution]

Shansen,

I think you should be capable of reaching 2kHz rates with new performance cRIO-903x. However you have to consider that there are other factors that might affect/bottleneck your performance.

- Code architecture is big one. Unefficient code can cause high CPU load and affect your timing. 

- Module update rate. Usually your slowest module sets the 'highest speed' of your system.

Tricks like disabling debugging mode for VI or making an RT application increases performance as well. 

[shansen1]

Thank you Miro_T. The final system will simply read the analog input value and immediately write it back out to the analog output, so I believe the code architecture will be a minimal overhead for this project. Thanks for the feedback, we will give it a try.