I need coherent BPSK modulator, i.e. the phase of IF carrier should start at the same value (let say zero) for each bit. Placing LUT in FPGA vi does not solve the problem and the starting phase is changed in stochastic manner from bit to bit
I am not sure I fully understand what you are trying to accomplish but I can offer a few suggestions based on what I think you are attempting. I believe you want each generation to begin at a set phase (i.e. zero phase). You are seeing random carrier phase on each bit which is expected if the carrier is not a multiple of the message frequency. I believe you have two options, either generate the signal such that the IQ rate and the Carrier frequency are multiples of one another so that the message signal will align to the carrier signal, or rest the NCO in the digital upconverter (DUC) before each bit is sent. This can be done by switching DAC profiles, which forces a reset of the NCO.
JaceD Signal Sources Product Support Engineer National Instruments