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I have attached a code with this post that shows how to used the DRAM as a FIFO similar to what you were trying to do. One thing I would suggest is Enable FIFO Reads first, and then Enable FIFO Writes. If you have the FIFO write enabled and the FIFO Read is disabled you are going to see FIFO full. The code I have attached is compiled and I have tested it.
Best Regards,
Jignesh P Applications Engineer
Best Regards, Jignesh Patel Principal RF Software Engineer