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How to Create Executable file for a project for Crio Platform

hi,

i am using CRIO 9014  platform  for my application development.
i am controlling (   Reset  &  then Run )  FPGA   from RT application .
Through TCP/IP  communication the  Acquired data  (   from FPGA  then followed by some Computation Logic in RT )   is sending   to HOST computer .
during the above process  
First i am starting the RT Application    (  the TCP  network will be continuously in listen mode )    then
 i am  starting my HOST Application   in the project .
 here i want  to build my complete project as an  executable file 
so that i no need to start  RT Application first and then HOST Application.
Could you please send me One sample Project           with built in simple  ADC Acquisition  loop /  logic  in FPGA  ,  then  one sample logic  / while loop   in RT   to   acquire  this ADC data from FPGA and  send to HOST    via  TCP/IP network then   the  HOST   with GUI    for  Display in the HOST .
This  complete project should be build in  .exe  file .
Please  complete project  files  and .exe file    as a  zip file.
Regards,
Venkat
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Hello,

 

The question you have asked is cRIO related and this is an IF-RIO discussion forum. For cRIO questions please post to the Real-Time Measurement and Control discussion forum.

 

Best Regards,

Jignesh P

Applications Engineer

Best Regards,
Jignesh Patel
Principal RF Software Engineer
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Hi,

I might be confused but what I understand from what you have mentioned is that you want to create a project having two VI's. One running on your FPGA target and another running on you host computer.You want to build a single executable file to complete the entire operation.
Unfortunately you cannot have both VI's in same executable file. You can build one executable file and deploy on your FPGA target that will start running as soon as the target is booted. And you can create another executable file for running VI on your host computer. And instead of using TCP to transfer data, you could use "Interface FPGA" from FPGA module to communicate between your host computer and communicate.

 

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