5641R - ADC0 & ADC1 synchronization / phase problem

[arnova]

We are trying to use a PXIe-5641R to acquire 2 analog signals fed into the 2 analog input channels (AI CH0/CH1). The FPGA generates complex FFTs for both channels and transfers them to PXIe-8106 CPU for further processing. Both the FPGA and the CPU are running custom code which was NOT developed by us and unfortunately the original author can't help us out. The problem is that the 2 ADC's are running out of sync which introduces random phase differences between the 2 channels for the complex FFTs generated by the FPGA. We have already figured out the problem must be somewhere near the ADC's and we suspect there's simply some parameter not properly configured "somewhere". We've also written a simple LabView test program which uses the 5641R's instrument driver (instead of using the custom FPGA code etc.) and then the ADC's ARE properly synchronised/in phase so it's not a hardware issue, as it seems.

Does anybody have an idea how to fix this issue? Any help would be highly appreciated.

[JVP]

Hello Arnova,

Can I have you look at a shipping example "ni 5640R Dual Channel Analog Input and Output". If you run that does the inputs have syncing problems? I think there may be something going on during the FFT calculations in FPGA. Can you also tell me a few pieces of information:

1) How much of a synchronization do you need?

2) What version of the drivers do you have?

3) What version of LabVIEW are you using?

4) How much of a phase difference are you seeing?

Best Regards,

Jignesh P

[arnova]

Thanks for your reply.

Here are the answers for your questions:

1) I need as much synchronisation as possible. We're performing a complex FFT cross correlation of the 2 signals fed into Channel 0 & 1. The synchronisation we're getting when using the 564X in driver-mode (without our custom FPGA code) seems sufficient. I think this is roughly 1% drift.

2) I tried several. We first used the one that shipped with the system, I think it was 1.2. But we also tried the last one, 1.6

3) The system came with LabView 8.6 but I also tried LabView 2009SP1: no difference.

4) The phase difference seems completely different for each run, making me believe there's no synchronisation at all between channel 0 & 1 at the moment.

I searched the examples for "ni 5640R Dual Channel Analog Input and Output" but I was unable to find it. Any idea where I can find it?

I've also attached a picture of the code running in the FPGA. Note that I also tried connecting the input of both FFT loops to a single ADC (ADC0), just to make sure there's isn't any problem "upstream". Since this fixed the phase-issue, it made me believe the problem is "somewhere" in the ADC's configuration.

kind regards,

Arno van Amersfoort

[tigr]

What about to try ADC-ing not in Asynchronous Wires Mode ? Just usual synchronous FPGA programming

[arnova]

I'm a totally rookie when it comes to programming FPGA's with LabView (I do have a lot a experience with VHDL and of course "normal" Labview). Any pointers/examples how to implement that in my FPGA LabView code?

[tigr]

Just like "Dual Channel Analog Input and Output" example (coming with 564x driver)

[JVP]

Hello arnova,

The example I mentioned is in the same file path as the other examples:

<LabVIEW>\examples\instr\ni5640R

There are two directories in the ni5640R folder, Driver and FPGA, the example I mentioned is in the FPGA folder:

<LabVIEW>\examples\instr\ni5640R\FPGA\PXIe-5641R

Please let me know if you still can't find this example.

Best Regards,

Jignesh P