04-02-2009 10:43 AM
Hi Marion,
a.) I changed the timing vi from continuous to finite sampling. I also added DAQmx start VIs in the time-critical loop since the Read and Write of the two samples has to be started every time again in the loop. The result was that the first run of the loop was okay but already in the second run an error occured saying somthing like: DAQmx start cannot restart or is not finished. The adding of a DAQmx Wait till finished VI did not help. So I tried to also add a DAQmx stop VI to stop the aquisition in every loop run. Also this did not work out!?
b.) Then I also tried your second tipp to use Software timed loop (see VI in the attachment). Here I did not use the DAQmx Timing VI at all (like in some examples). Here I got the following error message:
Error -200757 occured at DAQmx Read.vi:1
Possible reason(s):
Measurements: Sample Time Type is set to On Demand which is not supported for analog input on this device. Set Sample Timing Type to
Sample Clock. ...
But If I would do that I am at Hardware Timing again.
It would be nice if at least either Hardware or Software Timing would run.
Best regards,
Juergen
04-14-2009 07:13 AM
Hi Juergen,
please attach your VI again, then I may take a look at it.
Best regards
04-20-2009 03:48 AM
Here is the VI. It is the implementation of the software timed aquisition, that you suggested.
I also tried a hardware-timed finit samples aquisition. Therefore I had instead of the Read and Write Vi like in the sended example. 6 VIs: 1.) Start, Read, Stop 2.) Start, Write, Stop. Also the initialization was changed accoringly.
Best regards,
Juergen
04-21-2009 12:00 PM
Hello Juergen,
I got your code and am working on a solution. I hope to get back to you tomorrow.
Best regards
04-27-2009 05:05 AM
04-27-2009 06:11 AM
Thank you very much for your efforts Marion. I very much hope that the problem is not just a stupid implementation error from my side, but something of general interest.
Regards,
Juergen
04-28-2009 12:08 PM
Hello Juergen,
we tried to improve the performance of the device. I am sorry to tell you, but there is physically no way, to improve the phase shift between in- and output!
There are always the following steps to perform:
a) acquire samples from analog in (here you have to acquire at least 2) to buffer memory
b) transfer the samples from the memory of your data acquisition device to the memory (for example via DMA-tranfer, which is very quick)
c) write data to analog out buffer
d) start task
e) wait until task is performed
f) stop task
The problem here is, that starting and stopping the task takes up to several ms. The next problem ist, that we can not "copy" a value 1:1 from the input straight to the output. We have to wait until the acquisition is completed, then we have to write it to the output. This causes the time-delay.
If you take a lower amount of samples, the acquisition is faster, but you still have the delay of the task administration.
Additionally, a problem with the NI PXI-4461 Dynamic Signal Acquisition-Device is, that you can not acquire and write a single sample. So you always have to circle through an output buffer of at least a few samples to get a continuous signal.
For PID-Control loop applications below a cycle time of several ms, we recommend to use FPGA-based hardware.
Let me hear, if you have any other question!
04-29-2009 03:14 AM