Hi Christian,
Thanks for the MITE RLPM, that was the missing piece.
I am now having trouble getting two NI6533's to handshake. One is in a PCI x86 box running LynxOS, and the other is in a desktop PC. For the latter I'm using the Examples:Harware Input and Output:Traditional DAQ:Digital Input and Output:653x examples from LabView 7. Specifically, the Buffered Handshake Output.vi and Cont Handshake Output.vi.
The Cont Handshake Output vi is timing out at 1 second intervals waiting for the write to complete, so I'm assuming from this that no handshaking is occurring.
I can toggle the data lines statically and that looks OK in both directions. I've set the exchangePins bit=1 to swap the ACK/REQ signals on the LynxOS side.
I've attache
d a file that prints the register settings for all of the DIO registers on the LynxOS side. Perhaps you can spot something that's not right?
Also, I'm confused about the delay register settings. The manual states you can adjust the programmable delay from 0 to 700ns in 100ns increments. Yet all of the delay registers show 8-bits. I assume then that only the lower 3 bits are used.
The examples dio_ex12.cpp and dio_ex13.cpp set the group1ReqDelay=3, group1RegNotDelay=2, group1AclDelay=2, and group1AckNotDelay=2, which are consistent with this assumption. However, they set the group1DataDelay=100, which is not consistent. Is this register different than the others?
Thanks,
- Larry